As part of Columbia’s Digital Systems Laboratory, I designed an FPGA-based electric piano on a Xilinx Artix-7 board.
The system combined a note decoder, clock divider, and 7-segment display state machine to generate tones through a piezoelectric speaker. I later extended the design with a programmable playback mode, using encoded note sequences and timing control to reproduce melodies
I began by implementing the user interface logic in Verilog, mapping 8 switches and 4 pushbuttons into a one-hot note encoding scheme. This allowed for base notes, sharps/flats, and octave shifts to be selected. These inputs were combined into a 5-bit digital signal (note_in), which uniquely identified the selected note and served as the control input for the rest of the system.
I then designed the clock divider as a loadable binary counter, scaling the 100 MHz system clock down to audio frequencies. By parameterizing divider values tied to musical note frequencies, the FPGA produced tones in the 20 Hz–20 kHz range. A note decoder module mapped each encoded input to its corresponding divider constant, ensuring accurate pitch reproduction for the piano notes.
To provide user feedback, I implemented a 7-segment display state machine in Verilog that multiplexed digits to display the active note and octave. Sharps were indicated through the display's decimal point, while note letters and octave numbers were displayed using a lookup table.
To validate functionality, I also wrote a testbench that applied different switch and button combinations, verifying correct divider outputs and ensuring the design produced the expected notes before synthesizing to hardware.
Finally, I added an automatic playback mode that stored a sequence of note codes for different songs in a constant array. A counter-based controller advanced through the melody with a fixed delay per note, enabling song playback when triggered by a pushbutton while still allowing for the manual piano mode.
The FPGA piano produced over 20 playable notes across multiple octaves, with output frequencies accurate to within <0.05 Hz error. The Verilog design maintained both a manual play mode and a programmable playback mode that were able to work seemlessly together.
